Wiring Diagram

The collector of the NPN feeds the base of a larger PNP power transistor which supplies most of the current to the load. The output voltage will be about 0.7 volts below the voltage of the wiper of the 1K pot so the output can be adjusted from 0 to the full supply voltage minus 0.7 volts. Using two transistors provides a current gain of around 1000 or more so that only a couple milliamps of current is drawn from the voltage divider to supply a couple amps of current at the output.

Note that this circuit is much less efficient than the 555 timer dimmer circuit using a variabe duty cycle switching approach. A fairly large heat sink is required to prevent the PNP power transistor from overheating. The advantage of the circuit is simplicity, and also that it doesn't generate any RF interference as a switching regulator does. The circuit can be used as a voltage regulator if the input voltage remains constant.

The IC 7805 provides circuit designers with an easy way to regulate DC voltages to 5v. Encapsulated in a single chip/package (IC), the 7805 is a positive voltage DC regulator that has only 3 terminals. They are: Input voltage, Ground, Output Voltage.

Although the 7805 were primarily designed for a fixed-voltage output (5V), it is indeed possible to use external components in order to obtain DC output voltages of: 5V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 20V, 24V. Note that the input voltage must, of course, be greater that the required output voltage, so that it can be regulated downwards.

1.25V-15.19V Regulator/Adaptor Variabel Digital, is a series regulator with variable output from the digital 1.25V to 15.19V The first section of the circuit comprises a digital up-down counter built around IC1, a quad 2-input NAND Schmitt trigger (IC CD4093), followed by IC2, a binary up-down counter (CD4029 IC). Two gates of IC CD4093 are used to generate the up-down logic using the push buttons S1 and S2, respectively, while the other two gates form an oscillator to provide clock pulses to IC2 (CD4029). The frequency of oscillations can be varied by changing the value of capacitor C1 or preset VR1. IC2 receives clock pulses from the oscillator and produces a binary sequential output. As long as its pin 5 is low, the counter continues to count at the rising edge of each clock pulse, but stops counting as soon as its pin 5 is brought to logic 1. Logic 1 at pin 10 makes the counter to count upwards, while logic 0 makes it count downwards. Therefore the counter counts up by closing switch S1 and counts down by closing switch S2. The output of counter IC2 is used to realize a Digitally variable resistor.